Thursday, 8 November 2012

STAC summit

I went to the STAC summit in London yesterday.
Always interesting, this was no exception.
I noted:
The interest in map reduce frameworks - IBM's use of their grid (called Platform Symphony to distinguish it from where the Lotus desktop software now called Lotus Symphony) getting improvements in one STAC test of 1.4 to 10 times against the vanilla Apache Hadoop, mainly they thought through better scheduling of the tasks and not stopping and starting processes as much.
The use of microwave routes for some data giving for example sub 5 ms (4.45 to 4.8) routes London Frankfurt as long as you don't have the wrong type of rain
Continued improvement in  switches and an initial look on programming for the Intel Phi coprocessor board.
The key point seemed to be that if you don't use the vector units and parallelisation together with the Phi it's quite possible you're better off not bothering, as one slide showed. So there's some work needed to use it properly, but that should be a fraction of the work needed to make your code work on a GPU
From a developer's perspective it does seem that compilers are not keeping up with the advances in hardware, from handling RAM caches properly to pragmas for how to parallelise
Still if they manage to price somewhere near their advance pricing of 400 USD the Texas Advanced Computer Centre paid it should sell. All to be disclosed next week apparently at the supercomputing conference

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